Parallel implementation of the fast Fourier transform on two TMS320C25 digital signal processors
Hen‐Geul Yeh · IEEE Transactions on Industrial Electronics · 1994
The author used two fixed-point TMS320C25 digital signal processors (DSPs) to implement in parallel the FFT. The significance of this multiprocessing system is: (1) the number of times block data transfer occurs between these two DSPs is minimum, (2) each DSP can independently perform the same FFT routine with different data set, and (3) the total computational load is nearly equally distributed to two DSPs. The speedup of this system over a single sequential processor is close to two.>