Platform-based MPEG-4 video encoder SoC design
Yung‐Chi Chang, Wei-Min Chao, Liang‐Gee Chen · 2004
An MPEG-4 video coding SOC design is presented. We adopt a platform-based architecture with an embedded RISC core and efficient memory organization. A motion estimator supporting predictive diamond search and spiral full search is implemented to provide a compromise between compression performance and design cost. The proposed data reuse scheme reduces the required memory access bandwidth. Several key modules are integrated into an efficient platform in a hardware/software codesign fashion. The cost-efficient video encoder SOC consumes 256.8 mW at 40 MHz and achieves real-time encoding of 30 CIF (352/spl times/288) frames per second.