Digital VLSI multiprocessor design for neurocomputers
C.-F. Chang, B.J. Sheu · 2003
The architecture and circuit design of digital processors for general-purpose neurocomputing are presented. The processing element is suitable for a tightly coupled multiprocessor chip connected in one-dimensional ring or two-dimensional mesh fashion. An off-chip microprogrammed array controller broadcasts instructions to all processing elements. Mappings of the feedforward and feedback operations in the backpropagation neural network into the mesh-connected processing element matrix are described. Detailed design of the circuit blocks is also described. More than 128 processing elements can be implemented in a super chip by use of advanced 0.5- mu m CMOS technology to achieve 2.56 billion operations per second.>