Design for testability for SoC based on IDDQ scanning

Miljana Sokolović, Predrag M. Petković, Vanco B. Litovski · 2008

One DFT solution for systems on chip, based on IDDQ measuring concept is presented in this paper. The application of Reconfigurable neurai networks off chip enables also good diagnostics capabilities. The solution is to be implemented in few digital blocks of the tree phase power meter IC and realized using CMOS035 technology. The simulation results obtained using Cadence Virtuoso show good performances of the solution.

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