Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions
Anup Hosangadi, Farzan Fallah, Ryan Kastner · 2005
This paper presents a novel technique to reduce the number of operations in Multiplierless implementations of linear DSP transforms, by iteratively eliminating two-term common subexpressions. Our method uses a polynomial transformation of linear systems that enables us to eliminate common subexpressions consisting of multiple variables. Our algorithm is fast and produces the least number of additions/subtractions compared to all known techniques. The synthesized examples show significant reductions in the area and power consumption.