Evaluation of various node configurations for fine-grain multithreading on stock processors
Jin‐Soo Kim, Soonhoi Ha, Chu Shik Jhon · 2002
It becomes more and more interesting to construct multi-threaded parallel machines using stock processors due to their high performance/price ratio. However no quantitative analysis has been reported on the effectiveness of various node configurations and its impact on the overall performance. In this paper we explore three different node configurations in detail and compare their dynamic characteristics through instruction-level simulation with six benchmark programs. Our experiments show that employing a dedicated processor for communication and synchronization is a reasonable approach because it can almost double the performance. Several factors that limit the overall speedup are also presented.