Implementation of a semi-formal verification for embedded systems
LI Xi ZHU Yun · 2006
In the era of billion-transistor design, it is critical to establish effective verification technologies from the system level, all the way down to the implementations. This paper presents a PNPM simulation based verification methodology for equivalence checking between different abstraction levels and property verification at different abstraction levels. How to implement it with coverage-aware input biasing is elaborated.