A dedicated circuit for real time motion estimation
Osvaldo Colavin, Alain Artieri, J.-F. Naviner, Renaud Pacalet · 1991
Presents a circuit dedicated to real-time motion estimation in video compression systems. It computes motion vectors in the range -8/+7 for 8*4n and 16*4n sized blocks at pixel rates up to 18 MHz. The architecture is based on a 128 processor systolic array. This 270000 transistor IC uses a two metal layer 1.2 mu m CMOS process.>