Low-Power Operation of a Precision CMOS Temperature Sensor based on Substrate PNPs
André L. Aita, Kofi A. A. Makinwa · 2007
In this paper, a low-power version of a high-precision smart temperature sensor in 0.7 mum CMOS technology is presented. The sensor consists of two main blocks: the bipolar front-end and the ADC. The sensor's power dissipation was reduced by reducing the bias current of the substrate PNP transistors -the temperature-sensing element -to the minimum levels set by accuracy requirements. To keep the same current density, the PNPs were reduced in size, as were the ADC sampling capacitors CS, so the sensor's conversion time is maintained. Increased mismatch errors due to the use of lower bias currents and smaller devices are mitigated by Dynamic Element Matching and chopping techniques. For an accuracy requirement of plusmn0.1degC, a minimum PNP bias current of 250 nA is found. Measurement results for Ibias= 250 nA and CS= 1.25 pF show a 3sigma inaccuracy below plusmn0.3degC after offset calibration, and below plusmn0.08degC with "a two-point calibration, from -55degC to 125degC.