Designing agent chips
Insu Song, Guido Governatori · 2006
We outline meta-encoding schemas for compiling nonmonotonic logic theories into Verilog HDL (Hardware Description Language) descriptions. These descriptions can be synthesized into gate level specifications for direct fabrication of silicon chips1. The method is applied for designing agent chips incorporating similar features found in the BDI (Belief, Desire, and Intention) and Brooks’ subsumption architectures.