An ILP formulation for system-level application mapping on network processor architectures
Chris Ostler, Karam S. Chatha · 2007
Current day network processors incorporate several architec-tural features including symmetric multi-processing (SMP), block multi-threading, and multiple memory elements to support the high performance requirements of networking applications. We present an automated system-level design technique for application devel-opment on such architectures. The technique incorporates pro-cess transformations and block multi-threading aware data map-ping to maximize the worst case throughput of the application. We propose integer linear programming formulations for process allocation and data mapping on SMP and block multi-threading based network processors. The paper presents experimental re-sults that evaluate the technique by implementing representative network processing applications on the Intel IXP 2400 architec-ture. The results demonstrate that our technique is able to gen-erate high-quality mappings of realistic applications on the target architecture within a short time.