A low-power single-chip MPEG-2 CODEC LSI
Y. Tsuboi, H. Arai, Masaharu Takahashi, M. Oku · 2003
A single-chip MPEG-2 CODEC LSI design has been completed. The "CODEC" functions, i.e. both encoding and decoding functions, are provided. This LSI is being fabricated in a 0.18 /spl mu/m CMOS technology. Small chip size and low power consumption less than 500 mW are expected. This LSI is fully synthesizable from RTL source codes written in Verilog-HDL and easily adaptable to various IP (Intellectual Property) blocks.