Implementation of fast cosine transform on the Motorola DSP 96002 digital signal processor
S.K. Tang, S. C. Chan, K.L. Ho, F.K. Lam · 1991
The implementation of a fast cosine transform (FCT) algorithm on the Motorola DSP 96002 floating point digital signal processor is investigated. The algorithm adopted is one that was recently proposed by two of the authors (see S.C. Chan and K.L. Ho, 1990). Significant changes have been made to the basic algorithm to cope with the architectural features of the processor. Detailed timing results and limitations imposed by the processor are also presented.>