Analogue fault simulation based on layout dependent fault models
Russell Harvey, Andrew Michael Richardson, E.M.J.G. Bruls, Ke Th Baker · 2002
A testability analysis procedure for complex analogue circuits is presented based on layout dependent fault models extracted from process defect statistics. The technique has been applied to a mixed-signal phase locked loop circuit and a number of test methodologies have been evaluated including the existing production test. It is concluded that the fault coverage achieved by this test can be improved by the use of a supplementary test based on power supply variations.