A stereo vision processor
Richard A. Lane, N. A. Thacker, N. Luke Seed, Peter A. Ivey · 2002
This paper describes a chip designed to perform high-precision image rectification for a computer vision application stereo vision. The very high level of mathematical integrity which is required is not supported by commercial image warping devices. A two-layer metal 1 /spl mu/m CMOS process was used, and the chip operates at 20 MHz. The chip can "rectify" a 256/spl times/256 image at 25 frames/s and allows truly arbitrary image warps.