BIST-diagnosis of interconnect fault locations in FPGA's
J. Liu, S.J. Simmons · 2004
This paper presents a built-in self-test (BIST) diagnosis approach for FPGA interconnect. The proposed scheme has 100% fault coverage on wire segment stuck-at, stuck-open and bridging faults and programmable switch stuck on/off faults. Moreover, a single interconnect fault inside a Xilinx XC4020E is shown to be diagnosable within approximately 1 second using our approach.