Digital CMOS VLSI processor design for the implementation of neural networks using linear wavefront architecture
Massimo Conti, Simone Orcioni, Francesco Piazza, Claudio Turchetti · 2005
This paper presents a digital VLSI implementation of a neural network model using a linear array of processing elements. The pipelined architecture we suggest along with a proper processor design result in a modular and reconfigurable parallel structure capable of high throughput.