Circlets: Circuitry over the Internet

Gordon Brebner, Irwin O. Kennedy · Field-Programmable Custom Computing Machines · 2001

Custom computing aided by networks has been attracting increasing interest in recent years. At its simplest, bitstreams can be transmitted to programmable logic devices over the Internet. More elaborately, for example, the JBits API forms the basis for the Internet Reconfigurable Logic (IRL) solutions announced by Xilinx Inc. in late 1998. This allows Java descriptions of (Xilinx) programmed logic to be transmitted. However, neither approach is in the full spirit of open standards, given the built-in assumptions about the underlying technologies. An alternative approach was first proposed by Brebner at FCCM’98 [1], introducing the notion of a circlet: an applet expressed as a circuit. Thus, a circlet has the same relationship to a programmable logic device as a Java Byte Code program has to a microprocessor. A central point is that a circlet is a dynamic system component. That is, it will form part of a mixed circuitry-program implementation, but as a dynamically-included component, as opposed to a statically-included component derived from a monolithic design process. In several respects, consideration of the practical use of circlets was somewhat premature three years ago, but some recent developments now make circlets a much more realistic option for the future. These developments include: rapidly increasing array sizes; the emergence of more principles to guide array architecture design; the blending of programmable logic and processors in systems on chip; a greater acceptance of non-traditional programming methods; and consideration of security and reliability. A central need is to consider what can be termed Programmable Circuitry Architectures (PCAs), seeking to establish candidates for an abstract PCA suitable as a basis for representing circlets. A requirement is that this abstract PCA can be efficiently interpreted by real PCAs. It is not appropriate to carry over an exact analogy from the ISA world, i.e. to design real PCA circuitry that can interpret any supplied description of circuitry for the abstract PCA. The more appropriate notion is to specify a mapping algorithm from circuitry for the abstract PCA to circuitry for the real underlying PCA, which preserves the circuit structure and hence the inherent fine-grain parallelism. A significant challenge is whether there has been, or will be, sufficient convergence of real PCAs, to allow the definition of an abstract PCA that can be efficiently mapped. Increasing guidance is available on principles underlying efficient PCAs, particularly the recent work of Rose et al concerning optimal ranges for LUT size and for clustering.

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