Implementation of reconfigurable SHA-2 hardware core
Todor Mladenov, Saeid Nooshabadi · 2008
Secure Hashing Algorithm (SHA) is increasingly becoming popular for the online security applications, specifically, for mobile and embedded system platforms. This necessitates a high performance hardware implementation of the four most utilized SHA algorithms (SHA-224, SHA-256, SHA-384, SHA-512). This paper presents a reconfigurable SHA-2 IP core utilizing the available hardware for computing SHA-384/ SHA-512 and SHA-224/ SHA-256 with double the throughput.