A neural network systems component
Dietmar Mueller, Dan W. Hammerstrom · 2002
A CMOS device designed to interface the CNAPS (connected network of adaptive processors)-1064 neural processor IC to traditional computing environments is presented. The encapsulation of flexible I/O models and sequencer control into a modular architecture enables the creation of systems across a wide spectrum of performance capabilities. The CNAPS sequencer chip (CSC) provides a simple co-processor interface that can be easily adapted to different target environments and, at the same time, utilize the CNAPS architecture at the maximum performance possible.>