The white dwarf: a high-performance application-specific processor
A. Wolfe, Maurício Breternitz, Chriss Stephens, A.L. Ting, David B. Kirk, Ronald P. Bianchini, John Paul Shen · ACM SIGARCH Computer Architecture News · 1988
This paper presents the design and implementation of a high-performance special-purpose processor, called The White Dwarf, for accelerating finite element analysis algorithms. The White Dwarf CPU contains two Am29325 32-bit floating-point processors and one Am29332 32-bit ALU, and employs a wide-instruction word architecture in which the application algorithm is directly implemented in microcode. The entire system is VME-bus compatible and interfaces with a SUN 31160 host. The system's potential peak performance is 20 MFLOPS; a sustained computation rate in excess of 15 MFLOPS is expected. A potential speedup of between one and two orders of magnitude is possible. With a fully populated memory subsystem, the White Dwarf can accommodate finite element problems involving up to half a million nodes. The system is designed using an approach called Application-Specific Processor Design. A retargetable compiler has been developed which is capable of generating highly parallel and efficient code for the White Dwarf and other processors with similar architecture. System debuglintegration is in progress; a highly useful system is expected .