A BIST Circuit for DLL Fault Detection

Jia Cheng, Linda S. Milor · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2008

A built-in-self-test (BIST) circuit for the test of a delay-locked loop circuit (DLL) is proposed. This circuit is based on a simple XNOR logic gate and uncalibrated delay lines to sample the output of the XNOR gate, so very little area overhead is introduced. In addition, no external stimulus is required for this BIST circuit, besides the ldquostart testrdquo signal. Fault simulation results show high fault coverage of structural faults, combined with some coverage of parametric variations.

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