A multiprocessors architecture for a HDTV motion estimation system
R. Hervigo, J. Kowalczuk, D. Mlynek · IEEE Transactions on Consumer Electronics · 1992
A hierarchical block matching algorithm is a promising technique for motion estimation, especially in terms of computations. A real-time implementation of this algorithm was investigated for a high-definition TV data input rate. This system used a two-step hierarchical block matching algorithm. A highly parallel and pipelining multiprocessor architecture built with specific processors is described.>