A coded block adaptive neural network structure for pattern recognition VLSI
James B. Kuo, Y.K. Chen, Yuan Lu, W.C. Mao · 2002
A coded block adaptive neural network structure with a Hamming-Error-Correction-Technique (HECT), which can be used to greatly enhance the VLSI implementation capability of the block system using a parallel processor architecture is presented. According to simulation results, the coded block system with HECT provides a shorter learning time, and a better reconfigurability and an order-of-magnitude more efficient VLSI implementation capability.>