Three-dimensional computational pipelining with minimal latency and maximum throughput for L-U factorization
JoAnn M. Paul, M.H. Mickle · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 1998
A three-dimensional (3-D) wavefront array with minimal computation time (latency) of 2n-2 cycles for an n*n matrix and minimal block pipelining period of one is introduced and compared to existing two-dimensional (2-D) systolic array architectures for L-U factorization. An optimal processor-time product of (1/3)n/sup 3/ with cycles defined computationally by two operations is obtained when successive problem instances are considered. The 3-D architecture is extensible and scalable, is cycle invariant (all respects), has minimal node complexity of two arithmetic operations per cycle, has unidirectional data forwarding in three dimensions, has 100% utilization of processing elements for successive inputs, and has a cycle-invariant one-to-one correspondence between input/output ports and input/output matrix elements.