Power-Balanced Reconfigurable Floating-Gate-MOS Logic Circuit for Tamper Resistant VLSI
B. Tongprasit, T. Shibata · 2006
Design and experimental evaluation of power-balanced reconfigurable floating-gate-MOS logic circuit is presented. The circuit can represent all 512 symmetric Boolean functions for eight inputs and 256 Boolean functions for three-input symmetric/asymmetric functions. The programming of function is done by control signals. Namely, no change in hardware configuration is required. The proposed circuit employs a highly symmetric architecture. The input data and the control signals are broadcasted in pairs with their complementary values. As a result, the power consumption of the circuit is independent of the input data and the logic function. Hence, the proposed circuit is resistant to the power analysis attack