Cellular neural network based VLSI architecture for image processing
Krzysztof Ślot, Jacek M. Kowalski, J. Pacholik, Piotr Dȩbiec · 2002
The paper presents a way for increasing a size of images which can be processed using cellular neural networks based VLSI circuits. The basic idea is to reduce a number of rows which are being simultaneously processed in a network. To verify the proposed idea, a VLSI integrated circuit which allows for realizing selected gray-level image analyses, has been designed, manufactured and its performance was examined. In addition, a possibility of applying the proposed concept in realizing image processing operations where global signal propagation is crucial, such as halftoning, has been discussed.