A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals
T. Limberg, Markus Winter, Marcel Bimberg, Reimund Klemm, Emil Matúš, Marcos B. S. Tavares, Gerhard Paul Fettweis, Hendrik Ahlendorf, Pablo Robelly · 2008
The increasing number of radio protocols along with the need for multimedia support in mobile communication devices call for heterogeneous, programmable multi-core processors. In this paper, we present a fully programmable, heterogeneous single chip SDR platform with multimedia support, fabricated in a 0.13 μm CMOS process. Running at 175 MHz, a peak performance of 40 GOPS is delivered while dissipating 1.5 W. The typical MPSoC programmability problem is solved with a dedicated hardware unit which performs dynamic spatial and temporal mapping of tasks onto processing elements.