Optimizing current conveyors by evolutionary algorithms including differential evolution
Ivick Guerra-Gomez, Esteban Tlelo‐Cuautle, Trent McConaghy, Georges E. Gielen · 2009
An optimization system based on two multi-objective evolutionary algorithms NSGA-II and MOEA/D is presented for sizing analog integrated circuits. The proposed system uses HSPICE as circuit evaluator and its usefulness is highlighted by sizing mixed-mode analog circuits composed of unity-gain cells. That way, the circuits are optimized in voltage- and current-mode in three parameters: gain, bandwidth and offset, and by including as constraint that all transistors are in saturation operation. Comparison of performances between NSGA-II and MOEA/D with and without differential evolution (DE) as genetic operator in the optimization of two current conveyors are given by using standard CMOS integrated circuit technology.