Internal and External Bitstream Relocation for Partial Dynamic Reconfiguration
Simone Corbetta, M. Morandi, M. Novati, Marco Domenico Santambrogio, Donatella Sciuto, Paola Spoletini · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2009
The research described in this paper shows how the runtime relocation of a reconfigurable component can be obtained using a system component that is able to update the bitstream information, moving the reconfigurable module in the desired position. This scenario defines the so-called partial bitstream relocation activity. This paper proposes a relocation filter that can be implemented both as a hardware and a software component. The former is hosted in the static part of the reconfigurable architecture, while the latter is made to be run on the processor placed on the field-programmable gate array (FPGA). The proposed approach has also been validated over different FPGAs, i.e., Virtex II Pro, Virtex 4, and Virtex 5, proposing a runtime relocation support that can be customized to meet all the different constraints associated with these different target architectures.