Data Structures for Reporting Extension Violations in a Query Range
Ananda Swarup Das, Prosenjit Gupta, Kannan Srinathan · Canadian Conference on Computational Geometry · 2009
Design Rule Checking (DRC) in VLSI design involves checking if a given VLSI layout satisfles a given set of rules, and reporting the violations if any. We propose data structures for reporting violations of the minimum extension rule in a query window of interest.