Synthesizing interconnect-efficient low density parity check codes
Marghoob Mohiyuddin, Amit Prakash, Adnan Aziz, Wayne H. Wolf · 2004
Error correcting codes are widely used in communication and storage applications. Codec complexity has usually been measured with a software implementation in mind. A recent hardware implementation of a Low Density Parity Check code (LDPC) indicates that interconnect complexity dominates the VLSI cost. We describe a heuristic interconnect-aware synthesis algorithm which generates LDPC codes that use an order of magnitude less wiring with little or no loss of coding efficiency.