Generalizing square attack using side-channels of an AES implementation on an FPGA
Vincent Carlier, Hervé Chabanne, Emmanuelle Dottax, Hervé Pelletier · 2005
We show how to attack an implementation of AES on an FPGA where all bytes are processed in parallel. We introduce a new way of retrieving information, mixing algebraic properties and physical observations. The attack is based on a generalization of the Square Attack. We focus on the electromagnetic side-channel, but our results are still valid for power consumption analysis as they reflect a global phenomenon inside the chip; and so, this contrasts with situations where eavesdroppers take advantage of local electromagnetic emanations.