Concurrent forms of signal processing algorithms
William A. Porter · IEEE Transactions on Circuits and Systems · 1989
Forms of algorithms that facilitate rapid processing on affiliated systolic arrays are examined. Classes of linear maps A: E/sup /n to E/sup /n that can be computed on p*p arrays at speed. O(p) where p= square root n are identified. The array architectures which provide the requisite computational support are proposed. The expansion of arbitrary linear maps in terms of the fast maps is considered. The results include a definitive method for minimal expansions and for best approximations of an a priori order. A detailed comparative example which illustrates the principles in question is also included.>