Software design verification using FTA
T. Fukuya, M. Hirayama, Yukihiro Mihara · 2002
We propose a verification approach for software specification. In order to avoid software design faults, our approach derives safety assertions using fault tree analysis, computes a behavioral graph of specification and analyzes statically whether this graph satisfies safety assertions. When there exists an assertion which can not hold, our method localizes software design faults. Moreover we show an example of our approach applied to a practical "microwave oven" development.>