A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory
Michele Borgatti, L. Calì, G. De Sandre, B. Forêt, D. Iezzi, Francesco Lertora, G. Muzzi, Marco Pasotti, M. Poles, Pier Luigi Rolandi · 2003
A 1GOPS dynamically reconfigurable processing unit with embedded Flash memory and SRAM-based FPGA targets image-voice processing and recognition applications. Code, data and FPGA bitstreams are stored in the embedded Flash memory and are independently accessible through 3 content-specific, 64-bit I/O ports with a peak read rate of 1.2GB/s. The system is implemented in a 0.18um, 2PL-6ML CMOS Flash technology, chip area is 70mm2.