An useful micropipeline architecture to implement DSP algorithms
Chiu‐Sing Choy, Tin-Chak Johnson Pang, J. Povazaniec, Cheong-Fat Chan · Proceedings. 24th EUROMICRO Conference (Cat. No.98EX204) · 2002
The paper describes an asynchronous architecture to implement DSP algorithms using the micropipeline technique. The micropipeline technique is already quite popular in the asynchronous community due to its compatibility with the conventional logic. However, there is currently little guidance on how to use micropipeline for more complex designs. The architecture proposed will meet this need. The architecture is scalable to trade off between size and speed, and has automation potential.