Improving code density using compression techniques
Charles R. Lefurgy, Peter L. Bird, I-Cheng K. Chen, Trevor Mudge · 1997
We propose a method for compressing programs in embedded processors where instruction memory size dominates cost. A post-compilation analyzer examines a program and replaces common sequences of instructions with a single instruction codeword. A microprocessor executes the compressed instruction sequences by fetching codewords from the instruction memory, expanding them back to the original sequence of instructions in the decode stage, and issuing them to the execution stages. We apply our technique to the PowerPC instruction set and achieve 30% to 50% reduction in size for SPEC CINT95 programs. Keywords: Compression, Code Density, Code Space Optimization, Embedded Systems Improving Code Density Using Compression Techniques 1 1 Introduction According to a recent prediction by In-Stat Inc., the merchant processor market is set to exceed $60 billion by 1999, and nearly half of that will be for embedded processors. However, by unit count, embedded processors will exceed the number of g...