Real-time speech coder implementation at 9.6 and 16 kb/s
Jared J. Wolf, K. Field · 2005
The practical feasibility of a speech coding algorithm is most effectively indicated by its successful real-time implementation. The implementation effort presents issues distinct from those related to the development of the algorithm. Problems of real-time software design and debugging, system reliability, and implementation correctness must be addressed. In addition, the power of a special purpose array processing computer is generally required to accomplish the real-time aspect of the implementation. The unique, often highly parallel architecture of available array processors can present the additional issues of multi-processor intercommunication and control. This paper considers successful approaches to these issues in the context of two real-time speech coder algorithms implemented on an array processor (a linear predictive baseband coder operating at 9.6 kb/s, and an adaptive predictive coder operating at 16 kb/s).