Testing the 500-MHz IBM S/390 microprocessor
T.G. Foote, D. E. Hoffman, William Huott, T.J. Koprowski, M.P. Kusko, Bryan Robbins · IEEE Design & Test of Computers · 1998
The design-for-test framework of the 500-MHz CMOS central processor uses specific tests to ensure the highest reliability of components within a system. Some of the same test patterns are applied in chip manufacturing and system-level tests.