A packet switching communication-based test access mechanism for system chips
M. Nahvi, A. Ivanov · 2005
In this paper, a Test Access Mechanism (TAM) architecture based on a packet switching communication network is presented. The basic goal is to develop a modular, generic, and configurable TAM.The proposed architecture provides a modular TAM that provides two levels of scalability, i.e., design-version scalability and multi-level scalability. Core access time and interconnect length models and simulation results for the proposed architecture are presented and compared to that of a bus- based TAM.