PHIDEO: a silicon compiler for high speed algorithms
P.E.R. Lippens, Jef L. van Meerbergen, A. van der Werf, Wim Verhaegh, Brian McSweeney, J. O. Huisken, O. McArdle · European Design Automation Conference · 1991
PHIDEO is a silicon compiler targeted at the design of high performance real time systems with high sampling frequencies such as HDTV. It supports the complete design trajectory starting from a high level specification all the way down to layout. New techniques are used to perform global optimisations across loop boundaries in hierarchical flow graphs. The compiler is based on a new target architectural model. Apart from the datapaths special attention is paid to memory optimisation. The new techniques are demonstrated using a progressive scan conversion algorithm. >