A new test generation method for sequential circuits
D.H. Lee, Sudhakar M. Reddy · 2002
A novel test generation method for synchronous sequential circuits is proposed. Among the new ideas employed are: (1) efficiently maintaining path information using an extended value system in forward time processing, and (2) efficiently enumerating cubes for state justification in backward time processing. Experimental results show that the proposed method is effective in generating high coverage tests for sequential circuits.>