Hybrid instruction cache partitioning for preemptive real-time systems
J.V. Busquets-Mataix, Juan José Serrano, Andy J. Wellings · 2002
Cache memories have been historically avoided in real-time systems because of their unpredictable behavior. In addition to the research focused at obtaining the worst-case execution time of cached programs (typically assuming no preemption), some techniques have been presented to deal with the cache interference due to preemptions (extrinsic or inter-task cache interference). These techniques either account for the extrinsic (cache) interference in the schedulability analysis, or annuls it by partitioning the cache. This paper describes a new technique, hybrid partitioning, which is a mixture of the former two. It either provides a task with a private partition or accounts for the extrinsic interference that may arise. The hybrid technique outperforms the original two for any workload or hardware configuration. In conclusion, it represents a powerful yet general framework for dealing with extrinsic cache interference.