Systolic array architecture for Gabor decomposition
Giridharan Iyengar, S. Panchanathan · IEEE Transactions on Circuits and Systems for Video Technology · 1995
We propose a combined systolic array-content addressable memory architecture for real-time Gabor decomposition. We then present codec designs for progressive image transmission using this architecture. Gabor decomposition is attractive for image compression since the basis functions match the human visual profiles. Gabor functions also achieve the lowest bound on the joint uncertainty of data. However these functions are not orthogonal and hence an analytic solution for tire decomposition does not exist. It has been shown that Gabor decomposition can be computed as a multiplication between a transform matrix and a vector of the image data. For an n/spl times/n image, the proposed architecture for Gabor decomposition consists of a linear systolic array of n processing elements each with a local CAM. Simulations and complexity studies show that this architecture can achieve real-time performance with current VLSI technology.>