Resource shared architecture of multiple transforms for multiple video codecs
Khan A. Wahid, Muhammad Ali Martuza, Mousumi Das, Carl McCrosky · 2011
The current trend of digital convergence leads to the need of the video decoder that should support multiple video standards such as, H.264/AVC, JPEG, MPEG-2, VC-1, and AVS on a single platform. In this paper, we present a resource-shared architecture of multiple transforms to support all five video codecs. The architecture is based on a new multi-dimensional delta mapping. Here the Inverse Discrete Cosine Transform (IDCT) of AVS, that has the lowest computational unit, is taken as the base to compute the IDCTs of the other four codecs. The proposed architecture uses only adders and shifters on a shared basis to reduce the hardware cost significantly. The shared architecture is implemented on FPGA and later synthesized in CMOS 0.18um technology. The results show that the proposed design satisfies the requirement of all five codecs and is suitable for low-cost implementation in modern multi-codec systems.