Testing regular arrays: the boundary problem
William Peter Marnane, Will R. Moore · 2003
The authors present a unifying approach to the testing of fine-grained VLSI arrays. The approach covers a wide range of regular arrays and leads directly to test pattern generation. It includes the often overlooked but nontrivial problem of observing the fault effects, especially at the edges of the arrays. The problems and possible solutions are illustrated using the example of a systolic correlator.>