A VLSI processor for parallel contour tracing
Iskender Agi, Paul J. Hurst, Anil Kumar Jain · IEEE Transactions on Signal Processing · 1992
A custom IC processor that traces contours in black-and-white images is described. The CMOS IC contains a finite state machine, an arithmetic logic unit (ALU), an input delay line, and RAM. Each process extracts the edges from a rectangular portion of the input image and traces the edges, producing a description of the contours. A complete tracing system employs an array of these processors. The array architecture allows expansion to handle arbitrarily large images. The processors trace independently, thereby providing fully parallel high-speed operation. Partial contours are generated as a result of the partitioning of the image among the processors. A postprocessor links any partial contours created by the subdivision of the input image. The contour-tracing algorithm and simulation results for compression ratio and number of operations are presented. The architecture and measured performance of the IC are described.>