Industrial experience with test generation languages for processor verification
Michael Behm, John M. Ludden, Yossi Lichtenstein, Michal Rimon, Michael Vinov · 2004
We report on our experience with a new test generation language for processor verification. The verification of two superscalar multiprocessors is described and we show the ease of expressing complex verification tasks. The cost and benefit are demonstrated: training takes up to six months; the simulation time required for a desired level of coverage has decreased by a factor of twenty; the number of escape bugs has been reduced.