Evolvable hardware with genetic learning
Takuya Higuchi, Masaya Iwata, Isamu Kajitani, Hirotaka YAMADA, Bernard Manderick, Yusuke Hirao, Masahiro Murakawa, Shin Yoshizawa, T. Furuya · 1996
This paper describes Evolvable Hardware (EHW) with genetic learning. EHW is hardware which is built on programmable logic devices (e.g. PLD and FPGA) and whose architecture can be reconfigured by using genetic learning to adapt to the new environment. There are two types of hardware evolutions; gate-level and function-level. As examples of gate-level evolution, a pattern recognition system and a welding robot controller are described. Then, function-level EHW is introduced. It is demonstrated that function-level hardware evolutions can attain high performances as in neural network applications (e.g. two spirals). New FPGA architecture for function-level evolution is also described.